SanDisk and Toshiba all set to deliver world’s largest capacity 3-bit-per-cell (X3) 48-layer 3D NAND flash chips
The fight for world’s fasted NAND flash chips has began true earnest. Samsung started shipping its 3D Vertical NAND (V-NAND) sporting Portable SSD T1 in May, 2015 and today SanDisk and Toshiba announced that they are now manufacturing the world’s highest capacity 3D NAND flash chips.
SanDisk and Toshiba announced today that they are manufacturing 256Gbit (32GB), 3-bit-per-cell (X3) 48-layer 3D NAND flash chips that offer twice the capacity of the next densest memory. These chips are currently being manufactured in their new Yokkaichi, Japan fabrication plant and will be available for customers by next year.
3D NAND flash chip opens opportunity for bigger capacity solid state drives aboard PCs and other equipments. As of now Flash is used as a storage option in light laptops, fastest data centres, and nearly every smartphone and tablet because of its lesser weight and size compared to conventional hard disks.
3D NAND works by stacking the components in vertical layers with extraordinary precision to create devices with three times higher data capacity than competing NAND technologies. This enables more storage in a smaller space, bringing significant cost savings, low power usage and higher performance to a range of mobile consumer devices, as well as the most demanding enterprise deployments.
As data cells begin to approach the size of individual atoms, traditional “planar” NAND is nearing its practical scaling limits. This poses a major challenge for the memory industry. 3D NAND is poised to make a dramatic impact by keeping flash storage aligned with Moore’s Law, the exponential trend of performance gains and cost savings, driving more widespread use of flash storage in the future.
The new 256Gbit flash chip, which uses 15 nanometer lithography process technology, is suited for diverse applications, including consumer SSDs, smartphones, tablets, memory cards, and enterprise SSDs for data centers, the companies said.
Based on a vertical flash stacking technology that the companies call BiCS [Bit Cost Scaling], the new flash memory stores three bits of data per transistor (triple-level cell or TLC), compared to the previous two-bit (multi-level cell or MLC) memory Toshiba had been producing with BiCS.
“This is the world’s first 256Gb X3 chip, developed using our industry-leading 48-layer BiCS technology and demonstrating SanDisk’s continued leadership in X3 technology. We will use this chip to deliver compelling storage solutions for our customers,” Siva Sivaram, SanDisk’s executive vice president for memory technology, said in a statement.
Key product features of this 3D NAND design include:
- Large Capacities – Triple the capacity of existing technology, up to 48GB of NAND per die, enabling 750GB to fit in a single fingertip-sized package. –
- Reduced Cost per GB – First-generation 3D NAND is architected to achieve better cost efficiencies than planar NAND.
- Fast – High read/write bandwidth, I/O speeds and random read performance.
- Green – New sleep modes enable low-power use by cutting power to inactive NAND die (even when other dies in the same package are active), dropping power consumption significantly in standby mode.
- Smart – Innovative new features improve latency and increase endurance over previous generations, and also make system integration easier.